When Sun Microsystems native SPARC processors were sucking wind, Sun marketing began talking down single threaded, high-clocked, large-fast cache-base execution environments in favor of a mythical transformation of most all applications into thread-rich execution environments. Sun made the term Thread Level Parallelism [TLP] prolific. Now that Oracle purchased Sun we read that single threaded, high-clock rate execution is being demanded by Oracle applications. Changing horses twice mid-stream does not impress data center managers.
In http://www.theregister.co.uk/2010/12/23/oracle_sparc_t_chip_roadmap_revisited/ , Timothy Prickett Morgan noted,
“Oracle has been promising a 3X improvement in "single strand" performance, which everyone takes to mean clock speed.”
“...Oracle might be overclocking the Sparc chips to reach the 5 GHz stratosphere of chip clock speeds. While this might not be the case, the question we need to be asking Oracle - and remember, Oracle doesn't answer questions - is: if not, why not? ”
Throughout the 2000s, Sun's customers were expecting explanations for its traditional UltraSPARC processors lacking in performance. In reality Sun, via Texas Instruments [TI], was not able to successfully fabricate, traditional high-clocked, large cache, state-of-the-art processors. Traditional processors, such as IBM POWER or Intel x86, were designed to maximize Instruction Level Parallelism [ILP] with fast single thread execution.
In mid-2002 Sun purchased Afara, the firm that designed processors with slow-clocks and simple cores able to maximize the executions of many threads. TI was able fabricate these processors with simple cores, small caches, and placed identical copies on a single die. This created Sun's Niagara processor line, known today as the UltraT1, 2, 3, etc. Sun began its CMT marketing campaign claiming that processor clocks have reached an asymptote and memory performance was scaling at 1/3 that of processor clocks, condemning traditional execution to the dust bin of history. Sun's CMT technology was purported to save the data center and do so at a low heat dissipation per thread regime. Sun's argument was that ILP has reached the end of the line, processor clocking had reached the point of creating unimaginable power densities, and memory technology was never going to catch up.
Sun's CMT contrarian market hype was taking place as IBM POWER4, the first commercial general purpose multi-core processor was setting performance records and Intel's Xeons were approaching 4 GHz. IBM's POWER6 hit 5GHz several years ago, and today's IBM System z (mainframe) processors run at 5.2 GHz. What Sun proclaimed as a semiconductor technology wall was torn down with cleaver designs by IBM, Intel and AMD. Sun sacrificed single thread performance as the cost of keeping a processor line alive. Sun paid the price as it lost market share. IBM and Intel today have multiple core processors running multiple simultaneous threads, never having to sacrifice single thread performance in the interim.
As we enter this decade it appears that Sun+Oracle plans on cranking up the clocks on their CMT processors while keeping the core count constant. In addition, Sun+Oracle appears to be adopting the capability to dynamically alter the number of threads per core allowing more of the CPU core to execute the thread (contrary to its CMT market hype) and enabling more cache per thread! Sound familiar? It should, considering IBM introduced it earlier last year calling it Intelligent Threading (see: http://www.theregister.co.uk/2010/02/08/ibm_power7_chip_launch/page2.html )
Oracle has basically contradicted nearly all of Sun's CMT marketing hype. The following link is one of the few remaining original CMT justification presentations still on the web, outside of oracle.com: http://gamma.cs.unc.edu/events/workshops/edge-06/SLIDES/shoaib.pdf Most of Sun's CMT processor presentations seem to have been excised from the web. A June 2005 blog that is still active at Oracle, http://blogs.sun.com/esaxe/entry/cmt_performance_enhancements_in_solaris states:
“Rather than butting heads with the laws of physics in an attempt to quickly burn though a single instruction stream (stumbling and stalling along the way), CMT processors do more by allowing multiple threads to execute in parallel.”
It wasn't that Sun's processors didn't meet performance expectations due to the laws of physics. Rather, they failed in meeting the challenge in designing and fabricating processors given the limits of solid state physics. It appears that Sun+Oracle are playing catch up again against IBM and Intel – neither of which waited around for the “laws of physics” to ease up :-).