IBM technologists and experts to speak at IEDM 2012

Hear from IBM technologists and experts at the 2012 IEEE International Electron Devices Meeting (IEDM) on a variety of topics, including the latest advances in SOI technology, embedded DRAM, flexible CMOS IC on plastic, carbon nanotubes and more. IEDM is being held at the Hilton San Francisco Union Square December 10-12, 2012. For more information, go to http://www.his.com/~iedm/general/ (link resides outside of ibm.com).

IBM papers at IEDM:

Invited Papers:

The Evolution of Dense Embedded Memory in High Performance Logic Technologies, S.S. Iyer, IBM

InAs-Si Heterojunction Nanowire Tunnel Diodes and Tunnel FETs, IBM Research, Zurich

Featured Papers:

High Performance Extremely Thin SOI (ETSOI) Hybrid CMOS with Si Channel NFET and Strained SiGe Channel PFET, IBM, STMicroelectronics, GLOBALFOUNDRIES, Renesas, Soitec, CEA-LETI

22nm High-Performance SOI Technology Featuring Dual-Embedded Stressors, Epi-Plate High-K Deep-Trench Embedded DRAM and Self-Aligned Via 15LM BEOL, IBM Semiconductor Research and Development Center

Advanced Flexible CMOS Integrated Circuits on Plastic Enabled by Controlled Spalling Technology, IBM Thomas J. Watson Research Center

Other IBM papers:

Sub-30nm Scaling and High-Speed Operation of Fully-Confined Access-Devices for 3D Crosspoint Memory Based on Mixed-Ionic-Electronic-Conduction (MIEC) Materials, IBM

UTBB FDSOI Transistors with Dual STI for a Multi-Vt Strategy at 20nm Node and Below, CEA-LETI, STMicroelectronics, IBM, GLOBALFOUNDRIES, Renesas

Scalable and Fully Self-Aligned n-Type Carbon Nanotube Transistors with Gate-All-Around, IBM Thomas J. Watson Research Center

Room-Temperature Carrier Transport in High-Performance Short-Channel Silicon Nanowire MOSFETs, IBM Thomas J. Watson Research Center, Massachusetts Institute of Technology

Statistical Measurement of Random Telegraph Noise and Its Impact in Scaled-Down High-k/Metal-Gate MOSFETs, Hitachi, Ltd., IBM

Temperature Dependence of TDDB Voltage Acceleration in High-k Bilayers and SiO2 Gate Dielectrics, IBM Semiconductor Research and Development Center, Universitat Autònoma de Barcelona

Hybrid Modeling and Analysis of Different Through-Silicon-Via (TSV)-Based 3D Power Distribution Networks, IBM Microelectronics, Rensselaer Polytechnic Institute

A Thermally Robust Phase Change Memory by Engineering the Ge/N Concentration in (Ge,N)xSbyTez Phase Change Material, IBM Thomas J. Watson Research Center, Turin Polytechnic University

Electromigration Extendibility of Cu(Mn) Alloy-Seed Interconnects, and Understanding the Fundamentals, IBM, GLOBALFOUNDRIES, Renesas, Applied Materials, University of Tsukuba

High Mobility High-κ-All-Around Asymmetrically-Strained Germanium Nanowire Trigate p-MOSFET, IBM Thomas J. Watson Research Center, University of British Columbia Vancouver

A 90nm CMOS Integrated Nano-Photonics Technology for 25 Gbps WDM Optical Communications Applications, IBM Research

An Integration Path for Gate-first UTB III-V-on-insulator MOSFETs with Silicon, using Direct Wafer Bonding and Donor Wafer Recycling, IBM Research, Zurich

For the complete IEDM Program, go to: http://www.his.com/~iedm/program/ (link resides outside of ibm.com)

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